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Publications

  1. Pradeep, C., Eapen, M.E., Joby, P.P. and Kizhakkethottam, J.J., 2018. Online placement and scheduling algorithm for reconfigurable cells in self-repairable field-programmable gate array systems. Computers & Electrical Engineering, 67, pp.836-850. Elsevier Publishing.
  2. Saranya, R., Pradeep, C. and Radhakrishnan, R., 2017. Design and implementation of a reconfigurable finite impulse response filter for adaptive systems. International Journal of Computational Systems Engineering, 3(1-2), pp.82-90. Inderscience Publishers.
  3. Nair, J.M. and Pradeep, C., 2016. Intelligent selective modular redundancy for online fault detection of adders in FPGA. International Journal of High Performance Systems Architecture, 6(4), pp.213-221.. Inderscience Publishers.
  4. Varghese, Anila Ann, and C. Pradeep. "FPGA implementation of area-efficient single precision floating point complex divider with fault detection." International Journal of Computational Systems Engineering 2.3 (2016): 174-181. Inderscience Publishers.
  5. Eapen, M.E., Pradeep, C., Varghese, A.A. and Nair, J.M., 2016. Placement Strategies for Faulty Cells in Module Relocation Based BISR Approach. Innovations in Bio-Inspired Computing and Applications (pp. 437-446). Springer International Publishing.
  6. Anjana, S., Pradeep, C. and Samuel, P., 2015. Synthesize of High Speed Floating-point Multipliers Based on Vedic Mathematics. Procedia Computer Science, 46, pp.1294-1302. Elsevier Publishing.
  7. Baby, N., Pradeep, C., Saranya, R. and Radhakrishnan, R., 2015. Synthesis of Reconfigurable Video Compression Modules in Virtex FPGAs for Multiple Fault Repair Mechanism. Procedia Computer Science, 46, pp.1333-1340. Elsevier Publishing.
  8. Saranya, R., Pradeep, C., Baby, N. and Radhakrishnan, R., 2015. FPGA Synthesis of Reconfigurable Modules for FIR Filter. International Journal of Reconfigurable and Embedded Systems (IJRES), 4(2).
  9. Baby, N. and Pradeep, C., 2014, July. FPGA partitioning and synthesis of reconfigurable video compression module. In Control, Instrumentation, Communication and Computational Technologies (ICCICCT), 2014 International Conference on (pp. 360-364). IEEE Xplore.
  10. Saranya, R. and Pradeep, C., 2014, July. FPGA synthesis of area efficient data path for reconfigurable FIR filter. In Control, Instrumentation, Communication and Computational Technologies (ICCICCT), 2014 International Conference on (pp. 349-354). IEEE Xplore.
  11. Anjana, S. and Pradeep, C., 2014, July. High speed integer multiplier designs for reconfigurable systems. In Control, Instrumentation, Communication and Computational Technologies (ICCICCT), 2014 International Conference on (pp. 393-397). IEEE Xplore.
  12. Pradeep, C, Radhakrishnan, R & Philip Samuel 2014, ‘Reduced Time Testing Method for Permanent Faults in Interconnects of Reconfigurable Hardware’, Proceedings of International Conference On Systemic, Cybernetics and Informatics, vol. 1 & 2, pp. 018-022.
  13. Pradeep, C, Radhakrishnan, R & Philip Samuel 2014, ‘Fault Recovery Algorithm Using King Spare Allocation and Shortest Path Shifting for Reconfigurable Systems’, Journal of Theoretical and Applied Information Technology, vol. 61, no.2, pp 254-261.
  14. Pradeep, C, Radhakrishnan, R 2014, ‘FPGA Evaluation of Reconfigurable Modules with Self Repair Mechanism’, International Journal of Reconfigurable and Embedded Systems, vol.3, no.2,pp.1-12.
  15. Pradeep, C, Radhakrishnan, R, Saranya, R & Philip Samuel 2014, ‘Area Efficient Data Path with Online Fault Detection Mechanism for Reconfigurable Systems’, Australian Journal of Basic and Applied Sciences, vol.8, no.10, pp. 239-245.
  16. Pradeep, C, Radhakrishnan, R, Neena Baby & Philip Samuel, ‘Multi objective Built in Self Repair Algorithm with Multiple Fault Detection for Reconfigurable Systems’, Journal of Theoretical and Applied Information Technology, vol. 69, no.2,pp.248-256.
  17. Pradeep, C, Radhakrishnan, R 2014, ‘Fault Detection Methods for Interconnects of Reconfigurable Hardware’, I-manager’s Journal on Embedded systems, vol.4, no.2, pp.1-11.
  18. Pradeep C."Design and Implementation of Reconfigurable LFSR “International Journal on Information and Communication Technologies, Volume 2, June 2009 (pp 139-142).
  19. Pradeep C,"Design and Implementation of Reconfigurable LFSR" Proceedings of International Conference ICVCom 09, SAINTGITS College of Engineering, Kottayam. (pp 315-318).
  20. Pradeep C,"Design and Implementation of 32 bit RISC Processor in FPGA" Proceedings of National Conference NCACS 2009, SJCET, Pala, Kottayam. pp 5-10.
  21. Pradeep C, “Verilog HDL implementation of Superscalar Processor with Speculative Branch Prediction", Proceedings of National Conference NC-(ET) 2, SAINTGITS College of Engineering, Kottayam. pp 315-318.
  22. Pradeep C, NIMISHA SUBHASH, RESHMA MARY JOHN, 2013.” Permanent Fault Detection Method for Interconnects in Reconfigurable Systems”, Proceedings of U.G.C Sponsored III National Conference on Modern Trends in Electronic Communication & Signal Processing.
  23. Reshma Mary John, Pradeep C., 2013.”Responsive Back-Up Circuits (RBC) Inspired Fault-Recovery Algorithm for Reconfigurable Systems”, Proceedings of U.G.C Sponsored III National Conference on Modern Trends in Electronic Communication & Signal Processing.
  24. Ajith Ravindran, Soya Treesa Jose and Pradeep C "A 1.5V Area Efficient Asynchronous Adder using MODL and Double Pass Transistor Logic" Proceedings of International Conference on Global Innovation in Technology and Sciences (ICGITS 2013),4-6th April 2013.
  25. Reshma Mary John, Pradeep C., 2013 ”Self-Repairing Algorithm with Shared Spare Allocation for Reconfigurable Systems”, International Journal of Emerging Technology and Advanced Engineering. Volume 3, Issue 8, pp 716-721.
  26. Ajith Ravindran, Soya Treesa Jose and Pradeep C"A 1.5V Area Efficient Asynchronous Adder using MODL and Double Pass Transistor Logic" International Journal of Scientific & Engineering Research, Volume 4, Issue 8, August 2013
  27. Jose, S.T. And Pradeep, C,2013 "Design of a multichannel NAND Flash memory controller for efficient utilization of bandwidth in SSD's "proceedings of International Multi-Conference on Automation, Computing, Communication, Control and Compressed Sensing (iMac4s), 22-23 March 2013,Kottayam,India.pp 235 - 239. IEEE Xplore.
  28. Oommen,D. And Pradeep,C.,2012 "Reconfigurable router using RLBS algorithm " Proceedings of 12th International Conference on Intelligent Systems Design and Applications (ISDA). 27-29 Nov.2012, Kochi, India. pp 332 - 336. IEEE Xplore
  29. Aith Ravindran And Pradeep C.,2012"1.5v, .18u Area Efficient 32 Bit Adder using 4T XOR and Modified Manchester Carry Chain " Proceedings of 12th International Conference on Trends in Innovative Computing 2012 - Intelligent Systems Design, 27-29 Nov.2012,Kochi,India.pp 140 - 144.
  30. Aith Ravindran And Pradeep C "Area Efficient Quad Bit PTL Adder", In Proc. of National Conference on VLSI and Embedded Systems Technology and Advancements, VESTA2012, Pg. 194 – 198, Oct. 2012.
  31. Soya Treesa Jose And Pradeep C, "Design of High Performance Flash Memory Controller," In Proc. of National Conference on VLSI and Embedded Systems Technology and Advancements, VESTA2012, Pg. 28 - 31, Oct. 2012.
  32. Dhanya Oommen And Pradeep C,"RLBSA-Adaptive Routing Algorithm for NOC," In Proc. of National Conference on VLSI and Embedded Systems Technology and Advancements, VESTA2012, Pg. 60 - 64, Oct. 2012. 
  33. Mathew, B.K., John, S.K., Pradeep, C., 2008 "New Technique for Fault Detection in Quantum Cellular Automata "Proceedings of First International Conference on Emerging Trends in Engineering and Technology (ICETET '08),16-18 July 2008,Nagpur, Maharashtra, India. pp 834 - 837. IEEE Xplore.
  34. Binu K Mathw, Pradeep C And Shajimon K John, "DFT Techniques for opens in CMOS latches" Proceedings of First International Conference on Advances in Computing, Chikhli, India, 21-22 February 2008.

Memberships

 1. IEEE Member
2. ISTE Life Member
3. ACM Member
4. IAENG Member
5. UACEE Senior Member

Research Interest

 1. Testing VLSI Circuits
2. Advanced Digital Design
3. CMOS VLSI Design
4. Microprocessors & Microcontrollers
5. Linear Integrated Circuits

Achievements

  1. Reviewer in International Journal of Computational Systems Engineering, Inderscience Publishers.
  2. Reviewer in International Journal of Information and Communication Technology, Inderscience Publishers.
  3. Reviewer in International Journal of Embedded Systems, Inderscience Publishers.
  4. Chairperson cum Session chair for various National and International Conferences.
  5. Examiner of PhD thesis evaluation.

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